1. Field of the Invention
The invention relates to an output circuit for an integrated circuit, of TTL-CMOS type.
2. Description of Related Art Including Information Disclosed Under 37 C.F.R. .sctn.1.97-1.99.
In the technology of integrated circuits of the TTL-CMOS type, the digital-type input-output signals have to exhibit a high logic level and a low logic level each corresponding to an electrical voltage value, each recognized as such. More specifically, each of the abovementioned electrical voltages has to lie within a range of electrical voltage values, which are each recognized as corresponding to the logic level in question.
With the advent of the most recent integrated circuits, the abovementioned ranges of values have been subject to a redefinition. In TTL technology, the high logic level corresponds to an electrical voltage greater than 1.5 volts, the low logic level corresponding to an electrical voltage lying between 1.5 volts and the reference voltage, the earth voltage of the circuit. In CMOS technology, the high logic level corresponds to a voltage greater than or equal to 2.4 volts and the low logic level to a voltage lying between 0.4 volts and the reference voltage.
On top of the major interest in a potential reduction in the consumption of electrical energy such integrated circuits, consequent on the reduction in the amplitude of switching between the abovementioned logic levels, the average consumption being reduced correspondingly, these circuits are capable of allowing shorter switching times, and thus the implementation of faster circuits, provided that the electrical voltages defining the abovementioned high and low logic levels correspond to voltage values close to the limit values of the ranges of values for defining the TTL-CMOS levels, respectively above and below them, which makes it possible consequently to reduce the time for switching from one to the other of the levels.